Technical Papers


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See SBE’s technical papers on:

  1. Improving Capacitor Banks for Alternative Energy and UPS Systems
  2. Integrating the DC Link Capacitor into the Inverter Design
  3. Low Temperature Rise under Heavy Current
  4. Extreme Pulse Current Survival – High Frequency and Severe Magnitude Wave Shapes
  5. Industry Leading ESR/ESL Characteristics
  6. Significant Capacitance Density
  7. Resonance Circuit Applications
Improving Capacitor Banks for Alternative Energy and UPS Systems
  • Increasing the Life of Electrolytic Capacitor Banks Using Integrated High Performance Film Capacitors
    Presented at PCIM Europe 2013.
    Presentation (pdf link)
    Technical Paper (pdf link)
Integrating the DC Link Capacitor into the Inverter Design
  • Integrated DC Link Capacitor/Bus Structures to Minimize External ESL Contribution to Voltage Overshoot (pdf link).
    Presented at ITEC 2012, IEEE Transportation Electrification Conference.
    Abstract: Voltage overshoot is defined by stray series inductance and turn‐off time and must be managed to avoid failure of IGBTs in automotive inverters. The total equivalent series inductance (ESL) is dictated by internal switch branch inductance with a significant contribution in the current path to the DC link capacitor. Using traditional topologies, external ESL dominates and by‐pass capacitors (“snubbers”) are used to mitigate overshoot. Integrated capacitor/bus designs provide an external ESL comparable to internal values for commercial IGBTs. The minimized ESL regime allows reduced switch turn‐off time with slightly increased losses to manage overshoot without the cost, space, weight, dissipation, and reliability associated with by‐pass capacitors.
  • “Characterization of Equivalent Series Inductance for DC Link Capacitors and Bus Structures” (pdf link). Presented at PCIM Europe 2012.
    Abstract – The equivalent series inductance (ESL) of the DC link capacitor and associated bus structure connecting to the switch module has important implications for optimization of electric vehicle inverters. In many cases, additional snubber (bypass) capacitors can be eliminated for sufficiently low ESL, thus reducing cost, weight and volume. This paper presents ESL measurements for realistic capacitor/bus structures using a practical method previously documented. Supporting magneto-dynamic finite element analysis results are also presented and shown to agree quite well with the measurements. The measurement and simulation results demonstrate that a 1000 μF 600V Power Ring Film Capacitor has an ESL of approximately 3 nH with a properly designed terminal structure. The bus structure is shown to dominate the total ESL for both horizontal and vertical inverter topologies when using annular form factor film capacitors with an optimal terminal configuration.
  • “Electric Drive Cost Reduction by Design Simplification” (pdf link). Presented at SAE 2012 Hybrid and Electric Vehicle Technology Symposium, by Jon Bereisa, President and CEO of Auto Lectrification, LLC and SBE Senior Technical Advisor.
    Jon Bereisa – a top GM Electrified Powertrain Engineer – describes how utilizing SBE System Integration is the way of the future.
  • “Life Testing of High-Value Annular Form Factor DC Link Capacitors for Applications with 105°C Coolant”.
    Presented at PCIM Europe 2011.
    Presentation (pdf link)
    Paper (pdf link)
    Abstract – The SBE Power Ring Film CapacitorTM offers the advantages of high capacitance value, low equivalent series resistance and inductance, and minimal temperature rise using polypropylene film.
    Recent work has addressed optimization of the Power Ring for automotive DC link applications with funding from the US Department of Energy. Under this program, life testing of over 600 capacitors
    valued at 1000 µF has been performed to validate the design for coolant temperatures in the 105°C regime. This paper presents the methodology for the test program and describes the experimental
    apparatus. Results are discussed for testing to date, which has provided two million unit hours of exposure with only two failures observed after an initial pre-testing run which identified early failures
    later discovered to have defective film.
  • “Low Inductance – Low Temp Rise DC Bus Capacitor Properties Enabling the Optimization of High Power Inverters”. Presented at PCIM Europe 2010.
    Presentation (pdf link)
    Paper (pdf link)
    Abstract – High power density converter design is a fundamental requirement to meet the challenging performance, size, reliability, efficiency, and cost goals. PEM engineers use faster IGBTs that enable designs to meet these goals. Choosing the optimal bus structure is critical and drives the need for connections to minimize inductance and achieve optimal power density. Annular capacitors provide higher current carrying capability and lower temperatures, creating the opportunity to explore new bus options.
  • “A fully integrated 3 phase IGBT switching assembly with a very low loss DC Link Capacitor” (pdf link). Presented at VPPC 2009.
  • “New Inverter Layout and DC Link Capacitor Integration for Increased System Density and Performance”
    Presented at the IECON’08 – 34th Annual Conference of the IEEE Industrial Electronics Society.
    Technical Paper (pdf link)
    Presentation (pdf link)
    Discussion on the increased inverter efficiency which can be obtained by integrating the inverter switches and the DC Link capacitor into an optimized module.
  • “Reliability Considerations of Inverter/DC Link Capacitor Using PP Film and 105°C Engine Coolant”
    Presented at the IMAPS 2008 – 41st International Symposium on Microelectronics.
    Technical Paper (pdf link)
    Presentation (pdf link)
    Discussion on the possible reliability improvements using the SBE Power Ring in an Automotive Inverter application.
Low Temperature Rise under Heavy Current
Extreme Pulse Current Survival – High Frequency and Severe Magnitude Wave Shapes
  • “A 100kV Switch Mode Series Resonant Power Supply for Industrial Electrostatic Precipitators”
    From the 2009 IEEE Power Modulator Conference.
    Technical Paper (pdf link)
  • “Stacking the Power Ring for High Voltage and High Current Applications”
    From the 2007 IEEE Pulsed Power Conference.
    Technical Paper (pdf link)
    Presentation (pdf link) providing the details of the testing and design aspects in support of the above technical paper and an overview of the Power Ring stack, details on voltage grading, modularity advantages, and technical findings of the interconnect system used in the stack assembly.
  • Power Ring Optimized for Short Pulse Power (pdf link)
    Technical poster presented at IEEE Power Modulator Conference 2006, comparing test data of SBE’s patented pulse film technology and traditional metallized polypropylene film. In addition reliability data was presented from a 1,000,000 discharge test at 10,000 Amps.
  • Technical Paper: Annular Form Factor Film Capacitors (pdf link)
    Presented at the 2005 Pulsed Power Conference; reports on design, testing criteria, and results.
  • Technical Paper: An Extremely Low ESR and ESL Annular Film Capacitor (pdf link)
    Presented at PowerSystems World 2005; detailing use of the Power Ring in large switching power systems.
Industry Leading ESR/ESL Characteristics
  • “Low Inductance – Low Temp Rise DC Bus Capacitor Properties Enabling the Optimization of High Power Inverters” Presented at PCIM Europe 2010.
    Presentation (pdf link)
    Paper (pdf link)
  • Integrated DC Link Capacitor/Bus Structures to Minimize External ESL Contribution to Voltage Overshoot (pdf link)
    Presented at ITEC 2012, IEEE Transportation Electrification Conference.
    Abstract: Voltage overshoot is defined by stray series inductance and turn‐off time and must be managed to avoid failure of IGBTs in automotive inverters. The total equivalent series inductance (ESL) is dictated by internal switch branch inductance with a significant contribution in the current path to the DC link capacitor. Using traditional topologies, external ESL dominates and by‐pass capacitors (“snubbers”) are used to mitigate overshoot. Integrated capacitor/bus designs provide an external ESL comparable to internal values for commercial IGBTs. The minimized ESL regime allows reduced switch turn‐off time with slightly increased losses to manage overshoot without the cost, space, weight, dissipation, and reliability associated with by‐pass capacitors.
  • “Characterization of Equivalent Series Inductance for DC Link Capacitors and Bus Structures” (pdf link). Presented at PCIM Europe 2012.
    Abstract – The equivalent series inductance (ESL) of the DC link capacitor and associated bus structure connecting to the switch module has important implications for optimization of electric vehicle inverters. In many cases, additional snubber (bypass) capacitors can be eliminated for sufficiently low ESL, thus reducing cost, weight and volume. This paper presents ESL measurements for realistic capacitor/bus structures using a practical method previously documented. Supporting magneto-dynamic finite element analysis results are also presented and shown to agree quite well with the measurements. The measurement and simulation results demonstrate that a 1000 μF 600V Power Ring Film Capacitor has an ESL of approximately 3 nH with a properly designed terminal structure. The bus structure is shown to dominate the total ESL for both horizontal and vertical inverter topologies when using annular form factor film capacitors with an optimal terminal configuration.
  • “A 100kV Switch Mode Series Resonant Power Supply for Industrial Electrostatic Precipitators”
    From the 2009 IEEE Power Modulator Conference.
    Technical Paper (pdf link)
  • “Eddy Current Effects in Film Capacitors and their Impact on Interconnect Systems in High Power Applications”
    Presented at the Motor, Drive & Automation Systems Conference 2009 Presentation (pdf link)
    SBE summary of Power Ring research being conducted under our DoE SBIR and description of numerous interconnect options for efficient use.
  • “Stacking the Power Ring for High Voltage and High Current Applications”
    From the 2007 IEEE Pulsed Power Conference.
    Technical Paper (pdf link)
    Presentation (pdf link) providing the details of the testing and design aspects in support of the above technical paper and an overview of the Power Ring stack, details on voltage grading, modularity advantages, and technical findings of the interconnect system used in the stack assembly.
  • Technical Paper: Annular Form Factor Film Capacitors (pdf link)
    Presented at the 2005 Pulsed Power Conference; reports on design, testing criteria, and results.
  • Technical Paper: An Extremely Low ESR and ESL Annular Film Capacitor (pdf link)
    Presented at PowerSystems World 2005; detailing use of the Power Ring in large switching power systems.
Significant Capacitance Density
  • Power Ring for embedded e-drive applications (pdf link)
    Presentation from Motor & Drive Systems 2006 regarding implementation of Power Ring with circular inverter design.
  • “Stacking the Power Ring for High Voltage and High Current Applications”
    From the 2007 IEEE Pulsed Power Conference.
    Technical Paper (pdf link)
    Presentation (pdf link) providing the details of the testing and design aspects in support of the above technical paper and an overview of the Power Ring stack, details on voltage grading, modularity advantages, and technical findings of the interconnect system used in the stack assembly.
Resonance Circuit Applications